## SEARCH

#### Keywords

Voltage-mode Electronic control All-pass filter Resistorless filter Universal filter Voltage differencing inverting buffered amplifier (VDIBA) Active filter Active RC circuits Adjustable current amplifier Analog signal processing CMOS Colpitts oscillator Current conveyor Current conveyors (CCs) Current differencing unit#### Author

##### ( see all 43)

- Herencsar, Norbert 7 (%)
- Koton, Jaroslav 5 (%)
- Vrba, Kamil 5 (%)
- Sotner, Roman 4 (%)
- Jerabek, Jan 3 (%)

#### Subject

- Circuits and Systems 11 (%)
- Electrical Engineering 11 (%)
- Engineering 11 (%)
- Signal, Image and Speech Processing 8 (%)
- Signal,Image and Speech Processing 3 (%)

## CURRENTLY DISPLAYING:

Most articles

Fewest articles

Showing 1 to 10 of 11 matching Articles
Results per page:

## A 22 nm FinFET based 6T-SRAM cell design with scaled supply voltage for increased read access time

### Analog Integrated Circuits and Signal Processing (2015-07-01) 84: 119-126 , July 01, 2015

In ultra deep submicron technologies the process variation makes a vital impact on the design. The favorable device characteristic of FinFET avails them as a popular contender for a replacement of CMOS technologies. An optimal approach to increase the access time of a 6T-SRAM cell based on 22 nm FinFET technology is presented in this paper. The approach considers the statistical variation of supply voltage (V_{dd}) and their corresponding access time variation (read and write) due to technological transform. The spice code is developed and analyzed using HSPICE EDA tool. The simulation results of the read and write access time are evaluated using HSPICE and with Custom WaveView. The results show 11.057 and 12.233 ps for read and write access time at V_{dd} = 0.80 V which is the nominal voltage for 22 nm FinFET. The power consumption of the 6T-SRAM cell based on the proposed technique is 0.140 mW (at V_{dd} = 0.80 V) which is explored using Monte Carlo simulation in HSPICE.

## Voltage-mode full-wave rectifier based on DXCCII

### Analog Integrated Circuits and Signal Processing (2014-10-01) 81: 99-107 , October 01, 2014

The paper deals with the design and performance analyses of a current conveyor based voltage-mode full-wave rectifier. In the structure of the proposed non-linear circuit the second-generation current conveyor and dual-X current conveyor have been used as active elements. In the circuit the current sourcing scheme of the diodes is used to enable high-frequency signal processing. Except the active elements and only two rectifying diodes, other two resistors are required, generally operating as simple voltage-to-current and current-to-voltage converters. Using the CMOS implementation of the active elements, the performance of the rectifier was analyzed by evaluating the frequency dependent RMS error and DC transient value for different values of input voltage magnitudes. Furthermore, using readily available integrated circuits, the performance of the proposed structure has also been verified by experimental measurements that show the feasibility of the voltage-mode full-wave rectifier.

## New resistorless tunable voltage-mode universal filter using single VDIBA

### Analog Integrated Circuits and Signal Processing (2013-08-01) 76: 251-260 , August 01, 2013

To increase the universality of the recently introduced voltage differencing inverting buffered amplifier (VDIBA), this letter presents a new voltage-mode (VM) multi-input–single-output (MISO) universal filter. The proposed filter contains only single VDIBA, two capacitors, and one nMOS transistor, operated in triode region, and is used for resonance angular frequency tuning. Since in the structure no resistors are needed the filter can be classified as resistorless. The VM MISO filter compared with other active building block-based counterparts is very simple, it contains only few transistors, and has the smallest size area. Moreover, no component matching is required and it shows low sensitivity performance. The theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 SCN018 CMOS process parameters with ±0.9 V supply voltages. In addition, the behavior of the proposed VM filter was also experimentally verified using commercially available integrated circuits OPA660 and AD830.

## Voltage-mode multifunction filter with mutually independent Q and $$\omega _0$$ ω 0 control feature using VDDDAs

### Analog Integrated Circuits and Signal Processing (2014-10-01) 81: 53-60 , October 01, 2014

The paper focuses on the application possibilities of the newly presented voltage differencing active building block called voltage differencing differential difference amplifier. Using this active element, a multifunction frequency filter is designed featuring the possibility of mutually independent control of quality factor *Q* and characteristic frequency
$$\omega _0$$
by means of active elements. The structure of the filter is based on the idea of the Akerberg-Mossberg (AM) filter, i.e. the integrators in the structure are always realized only by two active elements. This fact results in better phase compensation for the filter. Compared to the AM opamp based filter, the newly proposed structure features high-impedance inputs, low-impedance output, and all basic frequency responses. The performance of the proposed structure has been verified by SPICE simulations using the TSMC
$$0.18\,\upmu \hbox {m}$$
level-7 SCN018 CMOS process parameters with
$$\pm 0.9\,\hbox {V}$$
supply voltage.

## Linearly tunable quadrature oscillator derived from LC Colpitts structure using voltage differencing transconductance amplifier and adjustable current amplifier

### Analog Integrated Circuits and Signal Processing (2014-10-01) 81: 121-136 , October 01, 2014

The paper deals with an interesting oscillator solution derived from LC Colpitts circuit structure. Electronically controllable current gain of the current amplifier is utilized for driving of oscillation condition together with two transconductances in frame of voltage differencing transconductance amplifier for adjusting of frequency of oscillation. In the proposed structure these elements replace common bipolar transistor and metal coil. Designed circuit offers important advantages, i.e. absence of metal coil, quadrature outputs, amplitudes of generated signals independent of tuning process, linear electronic control of oscillation frequency (independent of oscillation condition). Implementation of circuit for amplitude stabilization and automatic control of oscillation condition for designed circuit is simple. These benefits are not available in classical LC Colpitts structures or in many well-known third-order oscillators. The theoretical conclusions are supported by experiments with behavioral representation employing commercially available devices and also by simulations using CMOS model.

## Full characterization of gain and noise boundaries for NFmin or unity SWRout operation

### Analog Integrated Circuits and Signal Processing (2017-01-02): 1-9 , January 02, 2017

For a receiver sub-block , Low Noise Amplifier is the first stage after the receiving antenna and as a key device, its amplification and noise figure (NF) affects the whole performance of the receiving part. In this paper we present a full graphical visualization in terms of gain, standing wave ratio (SWR) and noise for a GaAs HJ-FET transistor in two operating cases; (1) NF_{min}, (2) Unity
$$\hbox {SWR}_{\mathrm{out}}$$
. The set of curves and contours presented will provide the designer with enough visual information about the transistor operating boundaries and will also visually assist on choosing the appropriate matching points for a wideband operation according to the desired (transducer gain
$$\hbox {G}_{\mathrm{T}},\hbox {SWR}$$
) for case (1) and (
$$\hbox {G}_{\mathrm{T}},\hbox {SWR}_{\mathrm{in}},\hbox {NF}$$
) for case (2). Numerical examples are given for each operating case and verified via a microwave circuit design software package to demonstrate the adequacy of the proposed graphical techniques . The results from simulations compare favourably with the visually estimated values.

## Dual-parameter control of the pole frequency in case of universal filter with MCDU elements

### Analog Integrated Circuits and Signal Processing (2016-12-01) 89: 705-718 , December 01, 2016

This paper presents an universal filter with control of the pole frequency by two mutually independent parameters—current gain (*B*) and intrinsic resistance (*R*_{x}) in frame of two modified current differencing unit (MCDU) active elements. This type of control extends and also improves features of the tuning range and is referred to as dual-parameter control. The current-mode filter is of the second order and the required type of the response (low pass, inverting band pass, high pass, band reject and all pass) is obtained by proper selection/combination of input(s)—this filter is of the multiple-input single-output type. The filter employs two capacitors, two MCDUs, each of them with four controllable parameters and one multiple-output current follower. The paper includes tuning range analysis, the simulation results with behavioral models and also laboratory measurement results with the same models. Moreover, designed transistor-level structures of both the active elements proposed in ON Semiconductor I3T CMOS 0.35 um technology that were used for final simulations confirm the workability and features of the designed concept.

## Phase shift keying modulator design employing electronically controllable all-pass sections

### Analog Integrated Circuits and Signal Processing (2016-12-01) 89: 781-800 , December 01, 2016

This paper presents two techniques of implementation of phase shift keying modulator. Both techniques are focused on the utilization of special features of an oscillator, which is based on first-order all-pass filters. The first method leads to modulators having generated signals with arbitrary phase shift between two outputs using only special features of oscillators in order to use less number of components in the structure. The second approach utilizes the same oscillator and also additional all-pass filter that increases the complexity of the circuitry, but eliminates requirements for extra-complicated driving circuit (control logic) and removes some undesired aspects of the first solution. The related circuits and subsystems are discussed in detail. Finally, features of all proposed structures are verified via PSpice using TSMC 0.18 um CMOS technology parameters and also by laboratory experiments with commercially available active devices. The experimental results agree both with simulation and theoretical analysis.

## Current-mode variable frequency quadrature sinusoidal oscillators using two CCs and four passive components including grounded capacitors

### Analog Integrated Circuits and Signal Processing (2012-05-01) 71: 303-311 , May 01, 2012

This paper reports realizations of current-mode quadrature sinusoidal oscillator using only two multiple-output current conveyors (first or second generation current conveyor CCI/CCII) and four passive components including two grounded capacitors. Therefore, the circuits employ minimum number of passive components to realize a second-order sinusoidal oscillator. Three types of circuits are reported depending on the condition of oscillation and frequency of oscillation (FO). The circuits have FO controllable by either resistor or capacitor and are suitable to be used as variable frequency oscillator for different applications. All the circuits provide two explicit quadrature current outputs from high output impedance terminals. PSPICE simulation results are included to verify the workability of the proposed circuits.

## Voltage-mode quadrature sinusoidal oscillator with current tunable properties

### Analog Integrated Circuits and Signal Processing (2010-11-01) 65: 321-325 , November 01, 2010

This letter presents a realization of voltage-mode quadrature sinusoidal oscillator with independent current tunable frequency of oscillation. The circuit uses a single differential voltage current conveyor transconductance amplifier (DVCCTA) as the active building block and four all grounded passive elements. PSPICE simulation results have been included to verify the theoretical results.